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INTEGRATED CIRCUITS
DATA SHEET
SAA2503 MPEG2 audio decoder
Objective specification File under Integrated Circuits, IC01 1997 Jul 02
Philips Semiconductors
Objective specification
MPEG2 audio decoder
FEATURES * Single-chip MPEG2 multichannel audio decoder * Decodes MPEG high quality audio: - MPEG1 layer 2 (44.1 kHz) - MPEG2 multichannel layer 2 (48 kHz) - Supports pause frames * Outputs 2 channels - Quasi surround down-mixing for Left and Right Dolby surround channel (Lt and Rt) - Stereo down-mixing for stereo reproduction - Stereo signal selection - Single channel down-mixing * Karaoke modes * Linear PCM modes: - Down-sampling from 96 to 48 kHz - Pass 48 kHz signals * Bitstream input interface I2S-bus (IEC 1937 formatted) * IEC 958 output interface (IEC 1937 formatted) * IEC 958 output simultaneously available while decoding MPEG2 * I2C-bus control * Output flags for direct control * Stand-alone operation possible (self-booting) * No external DRAM or SRAM required * On-chip PLL for internal clock generation * 13.5 or 27 MHz master clock * 100 pins plastic LQFP package * 5 V power supply. ORDERING INFORMATION TYPE NUMBER SAA2503HT PACKAGE NAME LQFP100 DESCRIPTION plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm APPLICATIONS
SAA2503
This IC is mainly intended for use in Digital Versatile Disc (DVD) players. However it may also be used in any application that is able to accept an MPEG2 audio bitstreams such as: * Set top boxes * Multimedia PCs * Digital television * Next generation audio equipment. GENERAL DESCRIPTION The SAA2503 incorporates all necessary functions, such as MPEG2 multichannel audio decoding plus down-mixing, MPEG1 layer 2 decoding, Linear PCM (LPCM) processing all producing high quality audio. Together with the serial audio interfaces and the IEC 958 transmitter this allows for the complete audio function of a DVD player in a single chip.
VERSION SOT407-1
1997 Jul 02
2
Philips Semiconductors
Objective specification
MPEG2 audio decoder
FUNCTIONAL I/O DIAGRAM
SAA2503
handbook, full pagewidth
H0 to H7 HA2 HA0 to HA2 HR/W HEN HOREQ HREQ HACK/PB14 SDB SCKR PARALLEL HOST INTERFACE I2C-BUS SERIAL HOST INTERFACE HA0 SDA SLK
SAA2503
WSR SCKT
GPIO0 to GPIO3 I2CEN BUSY MUTE FLAGS
SERIAL AUDIO INTERFACE
WST SDI0 SDI1 SDO0 SDO1
ADO ACI IEC 958 TRANSMITTER
SDO2
DSCK/OS1 OnCE DSI/OS0 DSO DR MODC MODB MODA reset interrupt PLL PLOCK PCAP PINIT RESET EXTAL
resrved (19)
MGK396
Fig.1 Functional I/O diagram.
1997 Jul 02
3
Philips Semiconductors
Objective specification
MPEG2 audio decoder
PINNING SYMBOL n.c. n.c. GNDA1 n.c. n.c. H7/PB7 H6/PB6 GNDH1 HOA2/PB10 VCCH1 HOA1/PB9 HR/W/PB11 HEN/PB12 VCCQ1 GNDQ1 HACK/PB14 GNDH2 HOA0/PB8 H5/PB5 VCCH2 H4/PB4 H3/PB3 GNDH3 H2/PB2 H1/PB1 H0/PB0 HOREQ/PB13 GNDH4 VCCH3 ADO ACI n.c. n.c. n.c. PLOCK VCCQ2 GNDQ2 PINIT GNDP PCAP 1997 Jul 02 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 I/O - - GND - - I/O I/O GND I/O supply I/O I/O I/O supply GND I/O GND I/O I/O supply I/O I/O GND I/O I/O I/O I/O GND supply O I - - - O supply GND I GND I not connected not connected ground 1 for some sections of internal logic not connected not connected not used not used isolated ground 1 for the HI I/O drivers not used DESCRIPTION
SAA2503
isolated power supply 1 for some sections of the internal chip logic not used not used not used isolated power supply 1 for the HI I/O drivers isolated ground 1 for the internal logic not used isolated ground 2 for the HI I/O drivers not used not used isolated power supply 2 for the HI I/O drivers not used not used isolated ground 3 for the HI I/O drivers not used not used not used not used isolated ground 4 for the HI I/O drivers isolated power supply 3 for the HI I/O drivers digital audio data output audio clock input not connected not connected not connected HIGH when PLL is phase locked isolated power supply 2 for some sections of the internal chip logic isolated ground 2 for the internal logic PLL enable/disable control ground dedicated for the PLL PLL capacitor input 4
Philips Semiconductors
Objective specification
MPEG2 audio decoder
SAA2503
SYMBOL VCCP EXTAL SCL GNDS1 SDA RESET MODA MODB MODC VCCS1 HA0 HA2 HREQ GNDS2 SDO2 SDO1 SDO0 VCCS2 SCKT WST SCKR GNDQ3 VCCQ3 GNDS3 WSR SDI1 SDI0 DSO DSI/OS0 DSCK/OS1 n.c. n.c. n.c. n.c. DR SDB MUTE GNDD1 BUSY I2CEN VCCD1 1997 Jul 02
PIN 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81
I/O supply I I GND I/O I I I I supply I/O I I GND O O O supply O O I GND supply GND I I I O O O - - - - I I/O I/O GND I/O I/O supply external clock/crystal Input I2C-bus serial clock
DESCRIPTION supply voltage for the Phase Locked Loop (PLL)
isolated ground 1 for the SHI I/O drivers I2C-bus data and acknowledge hardware reset for the microcontroller mode select A mode select B mode select C isolated power supply 1 for the SHI I/O drivers I2C-bus slave address 0 I2C-bus slave address 2 host request isolated ground 2 for the SHI I/O drivers not used not used serial data output 0 isolated power supply 2 for the SHI I/O drivers transmit serial clock transmit word select receive serial clock ground 3 dedicated for the PLL isolated power supply 3 for some sections of the internal chip logic isolated ground 3 for the SHI I/O drivers receive word select serial data input 1 not used not used not used not used not connected not connected not connected not connected not used general purpose I/O general purpose I/O ground 1 for some sections of internal logic general purpose I/O general purpose I/O isolated power supply 1 for some sections of the internal chip logic 5
Philips Semiconductors
Objective specification
MPEG2 audio decoder
SAA2503
SYMBOL GPIO3 GPIO2 GNDD2 GPIO1 GPIO0 GNDQ4 VCCQ4 n.c. n.c. GNDA2 n.c. VCCA1 n.c. n.c. GNDA3 n.c. n.c. n.c. VCCA2
PIN 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
I/O I/O I/O GND I/O I/O GND supply - - GND - supply - - GND - - - supply not used not used
DESCRIPTION
ground 2 for some sections of internal logic not used not used ground 4 for some sections of internal logic isolated power supply 4 for some sections of the internal chip logic not connected not connected ground 2 for some sections of internal logic not connected isolated power supply 1 for some sections of the internal chip logic not connected not connected ground 3 for some sections of internal logic not connected not connected not connected isolated power supply 2 for some sections of the internal chip logic
1997 Jul 02
6
Philips Semiconductors
Objective specification
MPEG2 audio decoder
SAA2503
87 GNDQ4
84 GNDD2
88 VCCQ4
96 GNDA3
91 GNDA2
100 VCCA2
86 GPIO0
85 GPIO1
83 GPIO2
82 GPIO3
I2CEN
MUTE 77
BUSY
handbook, full pagewidth
81 VCCD1
93 VCCA1 92 n.c
GNDD1
99 n.c
98 n.c
97 n.c
95 n.c
94 n.c
90 n.c
89 n.c
80
79
78
n.c. n.c. GNDA1 n.c n.c H7/PB7 H6/PB6 GNDH1 HOA2/PB10
1 2 3 4 5 6 7 8 9
76 75 74 73 72 71 70 69 68 67 66 65 64
SDB
DR n.c n.c n.c n.c DSCK/OS1 DSI/OS0 DSO SDI0 SDI1 WSR GNDS3 VCCQ3 GNDQ3 SCKR WST SCKT VCCS2 SDO0 SDO1 SDO2 GNDS2 HREQ HA2 HA0
VCCH1 10 HOA1/PB9 11 HR/W/PB11 12 HEN/PB12 13 VCCQ1 14 GNDQ1 15 HACK/PB14 16 GNDH2 17 HOA0/PB8 18 H5/PB5 19 VCCH2 H4/PB4 H3/PB3 GNDH3 H2/PB2 H1/PB1 20 21 22 23 24 25 H0/PB0 26 HOREQ/PB13 27 GNDH4 28 VCCH3 29 30 ACI 31 n.c. 32 n.c 33 n.c 34 PLOCK 35 VCCQ2 36 GNDQ2 37 PINIT 38 GNDP 39 PCAP 40 VCCP 41 EXTAL 42 SCL 43 GNDS1 44 SDA 45 RESET 46 MODA 47 MODB 48 MODC 49 VCCS1 50
SAA2503
63 62 61 60 59 58 57 56 55 54 53 52 51
ADO
MGK395
Fig.2 Pin configuration.
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
FUNCTIONAL DESCRIPTION Operating modes The SAA2503 can operate in 2 modes. Stand-alone (mode 4) In this mode (modC = 1, modB = 0 and modA = 0) the SAA2503 boots itself from the internal program ROM after power-up and can start decoding when a decoding mode has been selected via the I2C-bus. Booting via the I2C-bus (mode 7)
SAA2503
* LPCM down-sampling DVD (96 kHz: 4 channel input; 48 kHz 2 channel output) * LPCM DVD (48 kHz: 8 channel input; 2 channel output). System clock The preferred system clock to be applied to the EXTAL pin of the SAA2503 is 27 MHz if booted in mode 4 (stand-alone operation). The internal PLL multiplies this clock by a factor of 3 to obtain an 81 MHz internal clock. If using another external clock frequency it is advisable to ensure that: * The internal PLL is disabled during booting when fclk(ext) > 27 MHz * That 10 MHz < (fclk(ext) x 3) < 81 MHz. INTERFACING TO THE A/V SPLITTER Serial audio interface The serial audio interface can be configured as an I2S-bus interface and when required, as Quad I2S interface. The signal received via the I2S-bus is an encoded audio bitstream in accordance with IEC 1937, or LPCM.
In this mode (modC = 1, modB = 1 and modA = 1) the SAA2503 starts executing an internal boot program that will receive 1536 bytes via the I2C-bus and then write those to an on-chip program RAM. This mode allows the standard behaviour (I/O interfaces, additional processing) to be modified as specified in the stand-alone mode. Decoding modes The SAA2503 has the following decoding modes: * MPEG decoding (48 kHz DVD; 44.1 kHz VCD) IEC 958 LPCM * MPEG decoding (48 kHz DVD; 44.1 kHz VCD) IEC 958 BITSTR * LPCM CD-DA (44.1 kHz) Table 1 Pinning of the I2S-bus interface DESCRIPTION high impedance serial data serial data serial data serial data I2S-bus clock; notes 1 and 2 word select receive serial data begin I2S-bus clock; notes 1 and 2 word select transmit
PINS SDI0 SDI1 SDO0 SDO1 SDO2 SCKR WSR SDB SCKT WST Notes
PIN NUMBER 67 66 57 56 55 61 65 76 59 60 not used input/output output not used not used input input input input input
DIRECTION
1. SCKT is equal to SCKR when the I2S-bus format is the format of the input signal. When Quad I2S-bus is used SCKT = 14SCKR. 2. The maximum allowed clock frequency for SCK is 13fclk (fclk is the internal clock generated by the PLL of the SAA2503). 1997 Jul 02 8
Philips Semiconductors
Objective specification
MPEG2 audio decoder
MPEG2 bitstreams The MPEG2 audio bitstream is received via the I2S-bus in the same format as specified in IEC 1937. The MPEG2 audio bitstream consists of data bursts of 1 frame. The data is formatted in 16-bit chunks. The time period until the next frame is filled with logic 0. The serial data is received by the SAA2503 via the SDI1 pin (pin 66). For more information on transporting MPEG2 bitstreams via IEC 958 see IEC 1937. Linear PCM (LPCM) I2S-BUS Linear PCM samples are received in an I2S-bus format. Serial audio data is received via SDI1 (pin 66). The I2S-bus clock is received via SCKR (pin 61) and the I2S-bus word select is received via WSR (pin 65); the I2S-bus clock operates at 64fs. QUAD I2S-BUS
SAA2503
Quad I2S-bus is the interface providing audio samples in LPCM with 4 times the sampling frequency. The interface is an extension of the I2S-bus where the Serial Data Begin (SDB) indicates the first 2 channels out of 8 channels. The audio samples are transferred with MSB first, where each sample occupies 32 bits, filled with logic 0.
handbook, full pagewidth
SD
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
WS
SDB
SCK
12S-bus clock/Quad 12S-bus clock
1 sampling period
MGK398
Fig.3 Quad I2S-bus frame format.
The SDB remains HIGH when only 2 channels LPCM or encode bitstreams (in accordance with IEC 1937) are transferred (Quad I2S-bus is equal to I2S-bus).
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
Table 2 Allocation of LPCM channels on Quad I2S-bus, fs = 48 or 96 kHz INPUT fs (kHz) 48 48 48 48 48 48 48 48 96 96 96 96 CH0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 Q0 CH1 mute Q1 Q1 Q1 Q1 Q1 Q1 Q1 mute Q1 Q1 Q1 CH2 mute mute Q2 Q2 Q2 Q2 Q2 Q2 mute mute Q2 Q2 CH3 mute mute mute Q3 Q3 Q3 Q3 Q3 mute mute mute Q3 CH4 mute mute mute mute Q4 Q4 Q4 Q4 Q0 Q0 Q0 Q0 CH5 mute mute mute mute mute Q5 Q5 Q5 mute Q1 Q1 Q1
SAA2503
NUMBER OF LPCM CHANNELS 1 2 3 4 5 6 7 8 1 2 3 4
CH6 mute mute mute mute mute mute Q6 Q6 mute mute Q2 Q2
CH7 mute mute mute mute mute mute mute Q7 mute mute mute Q3
handbook, full pagewidth
SD
channel n + 1
WS
channel n
SDB
SCK 0 channel 0, 2, 4 or 6 31 0 channel 1, 3, 5 or 7 31
MGK397
Fig.4 Quad I2S-bus channel format.
1997 Jul 02
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
AUDIO OUTPUTS INTERFACING Also see Chapter "Interfacing to the A/V splitter". Stereo output for DAC The output stereo down-mixing signal is in I2S-bus format and can be directly connected to a DAC. The SDO0 (pin 57) provides the output for the serial audio data. Furthermore, SCKT (pin 59) provides the I2S-bus clock and WST (pin 60), the I2S-bus word select. IEC 958 transmitter The format of the IEC 958 interface consists of a sequence of IEC 958 sub frames. Each IEC 958 sub frame is normally used to carry one LPCM sample. The IEC 958 sub frame may also be used to convey data words. The non-PCM encoded audio bitstreams to be transferred are formed into data bursts. These bitstreams consist of a sequence of data words. Each data burst contains a 64-bit burst_preamble, followed by the burst_payload. Table 3 Pinning of IEC 958 interface PINS ADO ACI Note 1. The ACI clock is 256fs (or 512 or 384fs). INTERFACING WITH THE MICROCONTROLLER Flags The SAA2503 has 3 flags which, after a hardware reset, are all initialized to logic 1. 1. I2C-bus communication disabled (pin 80); I2CEN: this flag is set to logic 0 when the SAA2503 is ready to accept messages via the I2C-bus. 2. Life test (pin 79); BUSY: when the SAA2503 operates in the MPEG decoding mode, this flag toggles whenever the SAA2503 has detected a synchronization pattern. The flag will then produce a 20.833 Hz (fas = 48 kHz) and a 19.140 Hz (fas = 44.1 kHz) signal. It can be used to monitor the MPEG decoding process. When this flag no longer toggles there is an error. When the SAA2503 operates in one of the LPCM modes however, the flag produces either a 23.437 Hz (fas = 48 kHz) or a 21.533 Hz (fas = 44.1 kHz) signal. 1997 Jul 02 11 DESCRIPTION Audio Data Output Audio Clock Input; note 1 PIN NUMBER 30 31 output input
SAA2503
The burst_preamble provides a sync_word, information on the burst_payload and the bitstream number. The interface may convey one or more bitstreams. Each type of bitstream may impose a particular requirement for the repetition time for the data bursts that make up the bitstream. The 16-bit data words of a data burst are placed in time slots 12 to 27 of an IEC 958 sub frame. In the consumer application, both odd and even IEC 958-sub frames (CH1 and CH2) are simultaneously used to carry 32-bit data words (32-bit mode). This allows the consumer IEC 958 to convey either 2-channel LPCM audio, or a set of alternating data words, but not both simultaneously. For more information see IEC 1937. The IEC 958 interface is of the digital audio interface. This conveys LPCM or encoded audio bitstreams according to IEC 1937 (IEC 1937), using the `network layer' of IEC 958 (IEC 958). The audio data will be accompanied by a validity bit, channel status and user data (sub code).
DIRECTION
3. MPEG decoding active and synchronised (pin 77); MUTE: when the SAA2503 operates in the MPEG decoding mode, this flag indicates the state of the SAA2503 (synchronized or not). When this pin is at logic 1 the SAA2503 is out of sync, when set to logic 0 the SAA2503 is synchronized. It will not change state when the SAA2503 remains synchronized. When the SAA2503 is operating in one of the LPCM modes, the MUTE pin is set at logic 1 during initialization and logic 0 during processing. I2C-bus interface The I2C-bus interface supports data rates of up to 400 kbits/s. For a description of the I2C-bus see "The I2C-bus and how to use it", ordering number 9398 393 40011. For a description of the I2C-bus commands controlling the SAA2503 see Table 1.
Philips Semiconductors
Objective specification
MPEG2 audio decoder
APPLICATION SCHEMATIC
SAA2503
RESET handbook, full pagewidth L14 POWER VSS GND 41 VCCP 26 25 24 22 21 19 7 6 18 11 9 12 R134 10 k R135 10 k 86 JP37 jumper JP38 jumper JP39 jumper JP40 jumper JP41 jumper RESET JP42 jumper MODE SETTINGS JP43 jumper JP44 jumper R136 R137 10 k 10 k R138 10 k JP45 jumper I2C-BUS ADDRESS SETTINGS JP46 jumper R139 10 k R140 10 k U11B 3 74HC04 4 MUTE JP SCL SDA 1 2 3 HEADER 3
MGK399
C73 100 nF 93 100 VCCA2 VCCA1 81 VCCD1 10 VCCH1 20 29 VCCH2 VCCH3 14 VCCQ1 36 63 88 VCCQ3 VCCQ4 50 58 VCCS1 VCCS2
C74 100 nF
C75 100 nF
C76 100 nF
VCCQ2
H0/PB0 H1/PB1 H2/PB2 H3/PB3 H4/PB4 H5/PB5 H6/PB6 H7/PB7 HOA0/PB8 HOA1/PB9
WSR SCKR SDI0 SDI1 WST SCKT SDO0 SDO1 SDO2
65 61 67 66 60 59 57 56 55
WS-IN SCK-IN SD-IN
A B C
D E F
HOA2/PB10 HR/W/PB11 HEN/PB12 HOREQ/PB13 HACK/PB14
ADO
IEC 958 30 OUT (EBU) 31
G
13 27 16
SAA2503
ACI
DSCK/OS1 DSI/OS0 DSO DR
70 69 68 75
GPIO0 GPIO1 GPIO2 GPIO3 I2CEN BUSY GNDQ1 GNDQ2 GNDQ3 GNDQ4 GNDD1 GNDD2 GNDH1 GNDH2 GNDH3 GNDH4 GNDA1 GNDA2 GNDA3 GNDS1 RESET MUTE GNDP SDB MODC MODA MODB HREQ
85 83 82 I2CEN 80 BUSY 79 MUTE 77 SDB 76
PLOCK PCAP PINIT EXTAL GNDS2
35 40 38 42
H I J
SDA
HA0
HA2
SCL
39 3
91 96 78 84
51 52 45 43 53
47 48 49 46
8
17 23 28 15 37 62 87 44 4
n.c.
54
K
I2C-BUS CONTROL
Fig.5 Application diagram (continued in Fig.6).
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
SAA2503
serial audio data handbook, full pagewidth from A/V splitter
JP HEADER 4
1
2
3
4
D/A-CLK
A B C SDB
D E F 16 n.c. SYSCLK0 14 15 VSSD 7 CLKS1 8 CLKS2
J2 BNC G VCC LED D8 EMP1 U11A 1 74HC04 2 MUTE H I J JP50 jumper R141 10 k C78 1.2 nF VCC R142 470 EMP2 VCC SWS SCK DATA-L-R
12 5 4 6 17 18 21 19 20 13 3 11
SYSCLK1 WS BCK DATA DEEM1 DEEM2 ATSB MUSB DSMB n.c. TEST1 VDDD VDDA VSSD VSSA TEST2
VOL
22
C C 10 F 1 nF C C 1 nF 10 F
R 47 k
FILTCL
23
via OP-AMP to analog output
VOR
25
TDA1305
FILTCR
24
47 k
Vref 26 VDDO VSSO 28
C 100 nF
VCC
27
47 F
C 100 nF
10
9
1
2 C 100 nF C 47 F
MGK400
C 100 nF VCC R143 4.7 k DR VCC 74HC04 decoupling C79 100 nF L7 VCC BLM21A10 8 VCC 5 OUT GND 4 U54 27 MHz OSC C32 100 nF
R110 K 100E
Fig.6 Application diagram (continued from Fig.5).
1997 Jul 02
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
PACKAGE OUTLINE LQFP100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm
SAA2503
SOT407-1
c
y X 75 76 51 50 ZE A
e E HE wM bp L pin 1 index 100 1 ZD bp D HD wM B vM B 25 vM A 26 detail X A A2
Q A1 (A 3) Lp
e
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.6 A1 0.20 0.05 A2 1.5 1.3 A3 0.25 bp 0.28 0.16 c 0.18 0.12 D (1) 14.1 13.9 E (1) 14.1 13.9 e 0.5 HD HE L 1.0 Lp 0.75 0.45 Q 0.70 0.57 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 1.15 0.85 1.15 0.85 7 0o
o
16.25 16.25 15.75 15.75
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT407-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-12-19
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all LQFP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering Wave soldering is not recommended for LQFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices.
SAA2503
If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. Even with these conditions, do not consider wave soldering LQFP packages LQFP48 (SOT313-2), LQFP64 (SOT314-2) or LQFP80 (SOT315-1). During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA2503
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
NOTES
SAA2503
1997 Jul 02
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
NOTES
SAA2503
1997 Jul 02
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Philips Semiconductors
Objective specification
MPEG2 audio decoder
NOTES
SAA2503
1997 Jul 02
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
547027/1200/01/pp20
Date of release: 1997 Jul 02
Document order number:
9397 750 01802

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